diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts b/arch/arm/dts/at91-sam9x60_curiosity.dts
index 2e7ccb0..7c5b6ae 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -44,6 +44,11 @@
 							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
 							 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 					};
+
+					pinctrl_onewire_tm_default: onewire_tm_default {
+						atmel,pins =
+							<AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+					};
 			};
 		};
 	};
@@ -66,6 +71,18 @@
 	memory {
 		reg = <0x20000000 0x8000000>;
 	};
+
+	onewire_tm: onewire {
+		gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_onewire_tm_default>;
+		status = "okay";
+
+		w1_eeprom: w1_eeprom@0 {
+			compatible = "maxim,ds24b33";
+			status = "okay";
+		};
+	};
 };
 
 &macb0 {
diff --git a/arch/arm/dts/at91-sama5d27_giantboard.dts b/arch/arm/dts/at91-sama5d27_giantboard.dts
index e81ca60..2625f81 100644
--- a/arch/arm/dts/at91-sama5d27_giantboard.dts
+++ b/arch/arm/dts/at91-sama5d27_giantboard.dts
@@ -30,7 +30,7 @@
 		sdmmc1: sdio-host@b0000000 {
 			bus-width = <4>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
+			pinctrl-0 = <&pinctrl_sdmmc1_default>;
 			status = "okay";
 			u-boot,dm-pre-reloc;
 		};
@@ -73,10 +73,9 @@
 				u-boot,dm-pre-reloc;
 			};
 
-			pioA: gpio@fc038000 {
-				pinctrl {
-
-					pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
+			pioA: pinctrl@fc038000 {
+				pinctrl_sdmmc1_default: sdmmc1_default {
+					cmd_data {
 						pinmux = <PIN_PA28__SDMMC1_CMD>,
 							 <PIN_PA18__SDMMC1_DAT0>,
 							 <PIN_PA19__SDMMC1_DAT1>,
@@ -86,41 +85,41 @@
 						u-boot,dm-pre-reloc;
 					};
 
-					pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
+					ck_cd {
 						pinmux = <PIN_PA22__SDMMC1_CK>,
 							 <PIN_PA30__SDMMC1_CD>;
 						bias-disable;
 						u-boot,dm-pre-reloc;
 					};
+				};
 
-					pinctrl_uart1_default: uart1_default {
-						pinmux = <PIN_PD2__URXD1>,
-							 <PIN_PD3__UTXD1>;
-						bias-disable;
-						u-boot,dm-pre-reloc;
-					};
+				pinctrl_uart1_default: uart1_default {
+					pinmux = <PIN_PD2__URXD1>,
+						 <PIN_PD3__UTXD1>;
+					bias-disable;
+					u-boot,dm-pre-reloc;
+				};
 
-					pinctrl_i2c0_default: i2c0_default {
-						pinmux = <PIN_PD21__TWD0>,
-							 <PIN_PD22__TWCK0>;
-						bias-disable;
-					};
+				pinctrl_i2c0_default: i2c0_default {
+					pinmux = <PIN_PD21__TWD0>,
+						 <PIN_PD22__TWCK0>;
+					bias-disable;
+				};
 
-					pinctrl_i2c1_default: i2c1_default {
-						pinmux = <PIN_PD4__TWD1>,
-							 <PIN_PD5__TWCK1>;
-						bias-disable;
-					};
+				pinctrl_i2c1_default: i2c1_default {
+					pinmux = <PIN_PD4__TWD1>,
+						 <PIN_PD5__TWCK1>;
+					bias-disable;
+				};
 
-					pinctrl_usb_default: usb_default {
-						pinmux = <PIN_PB10__GPIO>;
-						bias-disable;
-					};
+				pinctrl_usb_default: usb_default {
+					pinmux = <PIN_PB10__GPIO>;
+					bias-disable;
+				};
 
-					pinctrl_usba_vbus: usba_vbus {
-						pinmux = <PIN_PA31__GPIO>;
-						bias-disable;
-					};
+				pinctrl_usba_vbus: usba_vbus {
+					pinmux = <PIN_PA31__GPIO>;
+					bias-disable;
 				};
 			};
 		};
diff --git a/arch/arm/dts/at91-sama5d27_som1_ek.dts b/arch/arm/dts/at91-sama5d27_som1_ek.dts
index efd1a5d..70d15c8 100644
--- a/arch/arm/dts/at91-sama5d27_som1_ek.dts
+++ b/arch/arm/dts/at91-sama5d27_som1_ek.dts
@@ -83,7 +83,7 @@
 		sdmmc0: sdio-host@a0000000 {
 			bus-width = <8>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
+			pinctrl-0 = <&pinctrl_sdmmc0_default>;
 			status = "okay";
 			u-boot,dm-pre-reloc;
 		};
@@ -91,7 +91,7 @@
 		sdmmc1: sdio-host@b0000000 {
 			bus-width = <4>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
+			pinctrl-0 = <&pinctrl_sdmmc1_default>;
 			status = "okay"; /* conflict with qspi0 */
 			u-boot,dm-pre-reloc;
 		};
@@ -129,7 +129,7 @@
 				u-boot,dm-pre-reloc;
 			};
 
-			pioA: gpio@fc038000 {
+			pioA: pinctrl@fc038000 {
 				pinctrl {
 					pinctrl_lcd_base: pinctrl_lcd_base {
 						pinmux = <PIN_PC5__LCDVSYNC>,
@@ -166,43 +166,47 @@
 						bias-disable;
 					};
 
-					pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
-						pinmux = <PIN_PA1__SDMMC0_CMD>,
-							 <PIN_PA2__SDMMC0_DAT0>,
-							 <PIN_PA3__SDMMC0_DAT1>,
-							 <PIN_PA4__SDMMC0_DAT2>,
-							 <PIN_PA5__SDMMC0_DAT3>,
-							 <PIN_PA6__SDMMC0_DAT4>,
-							 <PIN_PA7__SDMMC0_DAT5>,
-							 <PIN_PA8__SDMMC0_DAT6>,
-							 <PIN_PA9__SDMMC0_DAT7>;
-						bias-pull-up;
-						u-boot,dm-pre-reloc;
+					pinctrl_sdmmc0_default: sdmmc0_default {
+						cmd_dat {
+							pinmux = <PIN_PA1__SDMMC0_CMD>,
+								 <PIN_PA2__SDMMC0_DAT0>,
+								 <PIN_PA3__SDMMC0_DAT1>,
+								 <PIN_PA4__SDMMC0_DAT2>,
+								 <PIN_PA5__SDMMC0_DAT3>,
+								 <PIN_PA6__SDMMC0_DAT4>,
+								 <PIN_PA7__SDMMC0_DAT5>,
+								 <PIN_PA8__SDMMC0_DAT6>,
+								 <PIN_PA9__SDMMC0_DAT7>;
+							bias-pull-up;
+							u-boot,dm-pre-reloc;
+						};
+
+						ck_cd {
+							pinmux = <PIN_PA0__SDMMC0_CK>,
+								 <PIN_PA10__SDMMC0_RSTN>,
+								 <PIN_PA13__SDMMC0_CD>;
+							bias-disable;
+							u-boot,dm-pre-reloc;
+						};
 					};
 
-					pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
-						pinmux = <PIN_PA0__SDMMC0_CK>,
-							 <PIN_PA10__SDMMC0_RSTN>,
-							 <PIN_PA13__SDMMC0_CD>;
-						bias-disable;
-						u-boot,dm-pre-reloc;
-					};
+					pinctrl_sdmmc1_default: sdmmc1_default {
+						cmd_dat {
+							pinmux = <PIN_PA28__SDMMC1_CMD>,
+								 <PIN_PA18__SDMMC1_DAT0>,
+								 <PIN_PA19__SDMMC1_DAT1>,
+								 <PIN_PA20__SDMMC1_DAT2>,
+								 <PIN_PA21__SDMMC1_DAT3>;
+							bias-pull-up;
+							u-boot,dm-pre-reloc;
+						};
 
-					pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
-						pinmux = <PIN_PA28__SDMMC1_CMD>,
-							 <PIN_PA18__SDMMC1_DAT0>,
-							 <PIN_PA19__SDMMC1_DAT1>,
-							 <PIN_PA20__SDMMC1_DAT2>,
-							 <PIN_PA21__SDMMC1_DAT3>;
-						bias-pull-up;
-						u-boot,dm-pre-reloc;
-					};
-
-					pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
-						pinmux = <PIN_PA22__SDMMC1_CK>,
-							 <PIN_PA30__SDMMC1_CD>;
-						bias-disable;
-						u-boot,dm-pre-reloc;
+						ck_cd {
+							pinmux = <PIN_PA22__SDMMC1_CK>,
+								 <PIN_PA30__SDMMC1_CD>;
+							bias-disable;
+							u-boot,dm-pre-reloc;
+						};
 					};
 
 					pinctrl_uart1_default: uart1_default {
diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi
index 8c84dd0..41cf906 100644
--- a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi
+++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi
@@ -37,11 +37,7 @@
 	u-boot,dm-pre-reloc;
 };
 
-&pinctrl_sdmmc0_cmd_dat_default {
-	u-boot,dm-pre-reloc;
-};
-
-&pinctrl_sdmmc0_ck_cd_default {
+&pinctrl_sdmmc0_default {
 	u-boot,dm-pre-reloc;
 };
 
diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
index f3f6942..eec183d 100644
--- a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
+++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
@@ -34,7 +34,7 @@
 		sdmmc0: sdio-host@a0000000 {
 			bus-width = <4>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
+			pinctrl-0 = <&pinctrl_sdmmc0_default>;
 			status = "okay";
 		};
 
@@ -78,44 +78,44 @@
 				status = "okay";
 			};
 
-			pioA: gpio@fc038000 {
-				pinctrl {
-					pinctrl_lcd_base: pinctrl_lcd_base {
-						pinmux = <PIN_PC30__LCDVSYNC>,
-							 <PIN_PC31__LCDHSYNC>,
-							 <PIN_PD1__LCDDEN>,
-							 <PIN_PD0__LCDPCK>;
-						bias-disable;
-					};
+			pioA: pinctrl@fc038000 {
+				pinctrl_lcd_base: pinctrl_lcd_base {
+					pinmux = <PIN_PC30__LCDVSYNC>,
+						 <PIN_PC31__LCDHSYNC>,
+						 <PIN_PD1__LCDDEN>,
+						 <PIN_PD0__LCDPCK>;
+					bias-disable;
+				};
 
-					pinctrl_lcd_pwm: pinctrl_lcd_pwm {
-						pinmux = <PIN_PC28__LCDPWM>;
-						bias-disable;
-					};
+				pinctrl_lcd_pwm: pinctrl_lcd_pwm {
+					pinmux = <PIN_PC28__LCDPWM>;
+					bias-disable;
+				};
 
-					pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
-						pinmux = <PIN_PC10__LCDDAT2>,
-							 <PIN_PC11__LCDDAT3>,
-							 <PIN_PC12__LCDDAT4>,
-							 <PIN_PC13__LCDDAT5>,
-							 <PIN_PC14__LCDDAT6>,
-							 <PIN_PC15__LCDDAT7>,
-							 <PIN_PC16__LCDDAT10>,
-							 <PIN_PC17__LCDDAT11>,
-							 <PIN_PC18__LCDDAT12>,
-							 <PIN_PC19__LCDDAT13>,
-							 <PIN_PC20__LCDDAT14>,
-							 <PIN_PC21__LCDDAT15>,
-							 <PIN_PC22__LCDDAT18>,
-							 <PIN_PC23__LCDDAT19>,
-							 <PIN_PC24__LCDDAT20>,
-							 <PIN_PC25__LCDDAT21>,
-							 <PIN_PC26__LCDDAT22>,
-							 <PIN_PC27__LCDDAT23>;
-						bias-disable;
-					};
+				pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
+					pinmux = <PIN_PC10__LCDDAT2>,
+						 <PIN_PC11__LCDDAT3>,
+						 <PIN_PC12__LCDDAT4>,
+						 <PIN_PC13__LCDDAT5>,
+						 <PIN_PC14__LCDDAT6>,
+						 <PIN_PC15__LCDDAT7>,
+						 <PIN_PC16__LCDDAT10>,
+						 <PIN_PC17__LCDDAT11>,
+						 <PIN_PC18__LCDDAT12>,
+						 <PIN_PC19__LCDDAT13>,
+						 <PIN_PC20__LCDDAT14>,
+						 <PIN_PC21__LCDDAT15>,
+						 <PIN_PC22__LCDDAT18>,
+						 <PIN_PC23__LCDDAT19>,
+						 <PIN_PC24__LCDDAT20>,
+						 <PIN_PC25__LCDDAT21>,
+						 <PIN_PC26__LCDDAT22>,
+						 <PIN_PC27__LCDDAT23>;
+					bias-disable;
+				};
 
-					pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
+				pinctrl_sdmmc0_default: sdmmc0_default {
+					cmd_data {
 						pinmux = <PIN_PA1__SDMMC0_CMD>,
 							 <PIN_PA2__SDMMC0_DAT0>,
 							 <PIN_PA3__SDMMC0_DAT1>,
@@ -124,24 +124,24 @@
 						bias-disable;
 					};
 
-					pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
+					ck_cd_vddsel {
 						pinmux = <PIN_PA0__SDMMC0_CK>,
 							 <PIN_PA11__SDMMC0_VDDSEL>,
 							 <PIN_PA12__SDMMC0_WP>,
 							 <PIN_PA13__SDMMC0_CD>;
 						bias-disable;
 					};
+				};
 
-					pinctrl_uart0_default: uart0_default {
-						pinmux = <PIN_PB26__URXD0>,
-							 <PIN_PB27__UTXD0>;
-						bias-disable;
-					};
+				pinctrl_uart0_default: uart0_default {
+					pinmux = <PIN_PB26__URXD0>,
+						 <PIN_PB27__UTXD0>;
+					bias-disable;
+				};
 
-					pinctrl_onewire_tm_default: onewire_tm_default {
-						pinmux = <PIN_PC9__GPIO>;
-						bias-pull-up;
-					};
+				pinctrl_onewire_tm_default: onewire_tm_default {
+					pinmux = <PIN_PC9__GPIO>;
+					bias-pull-up;
 				};
 			};
 		};
diff --git a/arch/arm/dts/at91-sama5d2_icp.dts b/arch/arm/dts/at91-sama5d2_icp.dts
index 0b0db1b..2dffae9 100644
--- a/arch/arm/dts/at91-sama5d2_icp.dts
+++ b/arch/arm/dts/at91-sama5d2_icp.dts
@@ -86,75 +86,73 @@
 				};
 			};
 
-			pioA: gpio@fc038000 {
+			pioA: pinctrl@fc038000 {
 				status = "okay";
-				pinctrl {
-					pinctrl_i2c1_default: i2c1_default {
-						pinmux = <PIN_PD19__TWD1>,
-							 <PIN_PD20__TWCK1>;
-						bias-disable;
-					};
+				pinctrl_i2c1_default: i2c1_default {
+					pinmux = <PIN_PD19__TWD1>,
+						 <PIN_PD20__TWCK1>;
+					bias-disable;
+				};
 
-					pinctrl_macb0_rmii: macb0_rmii {
-						pinmux = <PIN_PD1__GRXCK>,
-							 <PIN_PD2__GTXER>,
-							 <PIN_PD5__GRX2>,
-							 <PIN_PD6__GRX3>,
-							 <PIN_PD7__GTX2>,
-							 <PIN_PD8__GTX3>,
-							 <PIN_PD9__GTXCK>,
-							 <PIN_PD10__GTXEN>,
-							 <PIN_PD11__GRXDV>,
-							 <PIN_PD12__GRXER>,
-							 <PIN_PD13__GRX0>,
-							 <PIN_PD14__GRX1>,
-							 <PIN_PD15__GTX0>,
-							 <PIN_PD16__GTX1>,
-							 <PIN_PD17__GMDC>,
-							 <PIN_PD18__GMDIO>;
-						bias-disable;
-					};
+				pinctrl_macb0_rmii: macb0_rmii {
+					pinmux = <PIN_PD1__GRXCK>,
+						 <PIN_PD2__GTXER>,
+						 <PIN_PD5__GRX2>,
+						 <PIN_PD6__GRX3>,
+						 <PIN_PD7__GTX2>,
+						 <PIN_PD8__GTX3>,
+						 <PIN_PD9__GTXCK>,
+						 <PIN_PD10__GTXEN>,
+						 <PIN_PD11__GRXDV>,
+						 <PIN_PD12__GRXER>,
+						 <PIN_PD13__GRX0>,
+						 <PIN_PD14__GRX1>,
+						 <PIN_PD15__GTX0>,
+						 <PIN_PD16__GTX1>,
+						 <PIN_PD17__GMDC>,
+						 <PIN_PD18__GMDIO>;
+					bias-disable;
+				};
 
-					pinctrl_macb0_phy_irq: macb0_phy_irq {
-						pinmux = <PIN_PD3__GPIO>;
-						bias-disable;
-					};
+				pinctrl_macb0_phy_irq: macb0_phy_irq {
+					pinmux = <PIN_PD3__GPIO>;
+					bias-disable;
+				};
 
-					pinctrl_macb0_rst: macb0_sw_rst {
-						pinmux = <PIN_PD4__GPIO>;
-						bias-pull-up;
-					};
+				pinctrl_macb0_rst: macb0_sw_rst {
+					pinmux = <PIN_PD4__GPIO>;
+					bias-pull-up;
+				};
 
-					pinctrl_mikrobus1_uart: mikrobus1_uart {
-						pinmux = <PIN_PB26__URXD0>,
-							 <PIN_PB27__UTXD0>;
-						bias-disable;
-					};
+				pinctrl_mikrobus1_uart: mikrobus1_uart {
+					pinmux = <PIN_PB26__URXD0>,
+						 <PIN_PB27__UTXD0>;
+					bias-disable;
+				};
 
-					pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
-						pinmux = <PIN_PA6__QSPI1_SCK>,
-							 <PIN_PA11__QSPI1_CS>;
-						bias-disable;
-					};
+				pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
+					pinmux = <PIN_PA6__QSPI1_SCK>,
+						 <PIN_PA11__QSPI1_CS>;
+					bias-disable;
+				};
 
-					pinctrl_qspi1_dat_default: qspi1_dat_default {
-						pinmux = <PIN_PA7__QSPI1_IO0>,
-							 <PIN_PA8__QSPI1_IO1>,
-							 <PIN_PA9__QSPI1_IO2>,
-							 <PIN_PA10__QSPI1_IO3>;
-						bias-pull-up;
-					};
+				pinctrl_qspi1_dat_default: qspi1_dat_default {
+					pinmux = <PIN_PA7__QSPI1_IO0>,
+						 <PIN_PA8__QSPI1_IO1>,
+						 <PIN_PA9__QSPI1_IO2>,
+						 <PIN_PA10__QSPI1_IO3>;
+					bias-pull-up;
+				};
 
-					pinctrl_sdmmc0_default: sdmmc0_default {
-						pinmux = <PIN_PA1__SDMMC0_CMD>,
-							 <PIN_PA2__SDMMC0_DAT0>,
-							 <PIN_PA3__SDMMC0_DAT1>,
-							 <PIN_PA4__SDMMC0_DAT2>,
-							 <PIN_PA5__SDMMC0_DAT3>,
-							 <PIN_PA0__SDMMC0_CK>,
-							 <PIN_PA13__SDMMC0_CD>;
-						bias-disable;
-					};
+				pinctrl_sdmmc0_default: sdmmc0_default {
+					pinmux = <PIN_PA1__SDMMC0_CMD>,
+						 <PIN_PA2__SDMMC0_DAT0>,
+						 <PIN_PA3__SDMMC0_DAT1>,
+						 <PIN_PA4__SDMMC0_DAT2>,
+						 <PIN_PA5__SDMMC0_DAT3>,
+						 <PIN_PA0__SDMMC0_CK>,
+						 <PIN_PA13__SDMMC0_CD>;
+					bias-disable;
 				};
 			};
 		};
diff --git a/arch/arm/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/dts/at91-sama5d2_ptc_ek.dts
index f45fb1e..36d52c2 100644
--- a/arch/arm/dts/at91-sama5d2_ptc_ek.dts
+++ b/arch/arm/dts/at91-sama5d2_ptc_ek.dts
@@ -94,7 +94,7 @@
 		sdmmc0: sdio-host@a0000000 {
 			bus-width = <8>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
+			pinctrl-0 = <&pinctrl_sdmmc0_default>;
 			status = "okay";
 			u-boot,dm-pre-reloc;
 		};
@@ -102,7 +102,7 @@
 		sdmmc1: sdio-host@b0000000 {
 			bus-width = <4>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
+			pinctrl-0 = <&pinctrl_sdmmc1_default>;
 			status = "disabled"; /* conflicts with nand and qspi0*/
 			u-boot,dm-pre-reloc;
 		};
@@ -137,34 +137,34 @@
 				};
 			};
 
-			pioA: gpio@fc038000 {
-				pinctrl {
-					pinctrl_i2c1_default: i2c1_default {
-						pinmux = <PIN_PC6__TWD1>,
-							 <PIN_PC7__TWCK1>;
-						bias-disable;
-					};
+			pioA: pinctrl@fc038000 {
+				pinctrl_i2c1_default: i2c1_default {
+					pinmux = <PIN_PC6__TWD1>,
+						 <PIN_PC7__TWCK1>;
+					bias-disable;
+				};
 
-					pinctrl_macb0_phy_irq: macb0_phy_irq {
-						pinmux = <PIN_PB24__GPIO>;
-						bias-disable;
-					};
+				pinctrl_macb0_phy_irq: macb0_phy_irq {
+					pinmux = <PIN_PB24__GPIO>;
+					bias-disable;
+				};
 
-					pinctrl_macb0_rmii: macb0_rmii {
-						pinmux = <PIN_PB14__GTXCK>,
-							 <PIN_PB15__GTXEN>,
-							 <PIN_PB16__GRXDV>,
-							 <PIN_PB17__GRXER>,
-							 <PIN_PB18__GRX0>,
-							 <PIN_PB19__GRX1>,
-							 <PIN_PB20__GTX0>,
-							 <PIN_PB21__GTX1>,
-							 <PIN_PB22__GMDC>,
-							 <PIN_PB23__GMDIO>;
-						bias-disable;
-					};
+				pinctrl_macb0_rmii: macb0_rmii {
+					pinmux = <PIN_PB14__GTXCK>,
+						 <PIN_PB15__GTXEN>,
+						 <PIN_PB16__GRXDV>,
+						 <PIN_PB17__GRXER>,
+						 <PIN_PB18__GRX0>,
+						 <PIN_PB19__GRX1>,
+						 <PIN_PB20__GTX0>,
+						 <PIN_PB21__GTX1>,
+						 <PIN_PB22__GMDC>,
+						 <PIN_PB23__GMDIO>;
+					bias-disable;
+				};
 
-					pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
+				pinctrl_sdmmc0_default: sdmmc0_default {
+					cmd_dat {
 						pinmux = <PIN_PA1__SDMMC0_CMD>,
 							 <PIN_PA2__SDMMC0_DAT0>,
 							 <PIN_PA3__SDMMC0_DAT1>,
@@ -178,7 +178,7 @@
 						u-boot,dm-pre-reloc;
 					};
 
-					pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
+					ck_cd {
 						pinmux = <PIN_PA0__SDMMC0_CK>,
 							 <PIN_PA10__SDMMC0_RSTN>,
 							 <PIN_PA11__SDMMC0_VDDSEL>,
@@ -186,8 +186,10 @@
 						bias-disable;
 						u-boot,dm-pre-reloc;
 					};
+				};
 
-					pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
+				pinctrl_sdmmc1_default: sdmmc1_default {
+					cmd_dat {
 						pinmux = <PIN_PA28__SDMMC1_CMD>,
 							 <PIN_PA18__SDMMC1_DAT0>,
 							 <PIN_PA19__SDMMC1_DAT1>,
@@ -197,34 +199,34 @@
 						u-boot,dm-pre-reloc;
 					};
 
-					pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
+					ck_cd {
 						pinmux = <PIN_PA22__SDMMC1_CK>,
 							 <PIN_PA30__SDMMC1_CD>;
 						bias-disable;
 						u-boot,dm-pre-reloc;
 					};
+				};
 
-					pinctrl_uart0_default: uart0_default {
-						pinmux = <PIN_PB26__URXD0>,
-							 <PIN_PB27__UTXD0>;
-						bias-disable;
-						u-boot,dm-pre-reloc;
-					};
+				pinctrl_uart0_default: uart0_default {
+					pinmux = <PIN_PB26__URXD0>,
+						 <PIN_PB27__UTXD0>;
+					bias-disable;
+					u-boot,dm-pre-reloc;
+				};
 
-					pinctrl_usb_default: usb_default {
-						pinmux = <PIN_PB12__GPIO>;
-						bias-disable;
-					};
+				pinctrl_usb_default: usb_default {
+					pinmux = <PIN_PB12__GPIO>;
+					bias-disable;
+				};
 
-					pinctrl_usba_vbus: usba_vbus {
-						pinmux = <PIN_PB11__GPIO>;
-						bias-disable;
-					};
+				pinctrl_usba_vbus: usba_vbus {
+					pinmux = <PIN_PB11__GPIO>;
+					bias-disable;
+				};
 
-					pinctrl_onewire_tm_default: onewire_tm_default {
-						pinmux = <PIN_PB31__GPIO>;
-						bias-pull-up;
-					};
+				pinctrl_onewire_tm_default: onewire_tm_default {
+					pinmux = <PIN_PB31__GPIO>;
+					bias-pull-up;
 				};
 			};
 		};
diff --git a/arch/arm/dts/at91-sama5d2_xplained.dts b/arch/arm/dts/at91-sama5d2_xplained.dts
index 34b64a2..78a3a85 100644
--- a/arch/arm/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/dts/at91-sama5d2_xplained.dts
@@ -44,7 +44,7 @@
 		sdmmc0: sdio-host@a0000000 {
 			bus-width = <8>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
+			pinctrl-0 = <&pinctrl_sdmmc0_default>;
 			status = "okay";
 			u-boot,dm-pre-reloc;
 		};
@@ -52,7 +52,7 @@
 		sdmmc1: sdio-host@b0000000 {
 			bus-width = <4>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
+			pinctrl-0 = <&pinctrl_sdmmc1_default>;
 			status = "okay"; /* conflict with qspi0 */
 			u-boot,dm-pre-reloc;
 		};
@@ -143,85 +143,85 @@
 				};
 			};
 
-			pioA: gpio@fc038000 {
-				pinctrl {
-					pinctrl_i2c1_default: i2c1_default {
-						pinmux = <PIN_PD4__TWD1>,
-							 <PIN_PD5__TWCK1>;
-						bias-disable;
-					};
+			pioA: pinctrl@fc038000 {
+				pinctrl_i2c1_default: i2c1_default {
+					pinmux = <PIN_PD4__TWD1>,
+						 <PIN_PD5__TWCK1>;
+					bias-disable;
+				};
 
-					pinctrl_lcd_base: pinctrl_lcd_base {
-						pinmux = <PIN_PC30__LCDVSYNC>,
-							<PIN_PC31__LCDHSYNC>,
-							<PIN_PD1__LCDDEN>,
-							<PIN_PD0__LCDPCK>;
-						bias-disable;
-					};
+				pinctrl_lcd_base: pinctrl_lcd_base {
+					pinmux = <PIN_PC30__LCDVSYNC>,
+						<PIN_PC31__LCDHSYNC>,
+						<PIN_PD1__LCDDEN>,
+						<PIN_PD0__LCDPCK>;
+					bias-disable;
+				};
 
-					pinctrl_lcd_pwm: pinctrl_lcd_pwm {
-						pinmux = <PIN_PC28__LCDPWM>;
-						bias-disable;
-					};
+				pinctrl_lcd_pwm: pinctrl_lcd_pwm {
+					pinmux = <PIN_PC28__LCDPWM>;
+					bias-disable;
+				};
 
-					pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
-						pinmux = <PIN_PC10__LCDDAT2>,
-							<PIN_PC11__LCDDAT3>,
-							<PIN_PC12__LCDDAT4>,
-							<PIN_PC13__LCDDAT5>,
-							<PIN_PC14__LCDDAT6>,
-							<PIN_PC15__LCDDAT7>,
-							<PIN_PC16__LCDDAT10>,
-							<PIN_PC17__LCDDAT11>,
-							<PIN_PC18__LCDDAT12>,
-							<PIN_PC19__LCDDAT13>,
-							<PIN_PC20__LCDDAT14>,
-							<PIN_PC21__LCDDAT15>,
-							<PIN_PC22__LCDDAT18>,
-							<PIN_PC23__LCDDAT19>,
-							<PIN_PC24__LCDDAT20>,
-							<PIN_PC25__LCDDAT21>,
-							<PIN_PC26__LCDDAT22>,
-							<PIN_PC27__LCDDAT23>;
-						bias-disable;
-					};
+				pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
+					pinmux = <PIN_PC10__LCDDAT2>,
+						<PIN_PC11__LCDDAT3>,
+						<PIN_PC12__LCDDAT4>,
+						<PIN_PC13__LCDDAT5>,
+						<PIN_PC14__LCDDAT6>,
+						<PIN_PC15__LCDDAT7>,
+						<PIN_PC16__LCDDAT10>,
+						<PIN_PC17__LCDDAT11>,
+						<PIN_PC18__LCDDAT12>,
+						<PIN_PC19__LCDDAT13>,
+						<PIN_PC20__LCDDAT14>,
+						<PIN_PC21__LCDDAT15>,
+						<PIN_PC22__LCDDAT18>,
+						<PIN_PC23__LCDDAT19>,
+						<PIN_PC24__LCDDAT20>,
+						<PIN_PC25__LCDDAT21>,
+						<PIN_PC26__LCDDAT22>,
+						<PIN_PC27__LCDDAT23>;
+					bias-disable;
+				};
 
-					pinctrl_macb0_phy_irq: macb0_phy_irq {
-						pinmux = <PIN_PC9__GPIO>;
-						bias-disable;
-					};
+				pinctrl_macb0_phy_irq: macb0_phy_irq {
+					pinmux = <PIN_PC9__GPIO>;
+					bias-disable;
+				};
 
-					pinctrl_macb0_rmii: macb0_rmii {
-						pinmux = <PIN_PB14__GTXCK>,
-							 <PIN_PB15__GTXEN>,
-							 <PIN_PB16__GRXDV>,
-							 <PIN_PB17__GRXER>,
-							 <PIN_PB18__GRX0>,
-							 <PIN_PB19__GRX1>,
-							 <PIN_PB20__GTX0>,
-							 <PIN_PB21__GTX1>,
-							 <PIN_PB22__GMDC>,
-							 <PIN_PB23__GMDIO>;
-						bias-disable;
-					};
+				pinctrl_macb0_rmii: macb0_rmii {
+					pinmux = <PIN_PB14__GTXCK>,
+						 <PIN_PB15__GTXEN>,
+						 <PIN_PB16__GRXDV>,
+						 <PIN_PB17__GRXER>,
+						 <PIN_PB18__GRX0>,
+						 <PIN_PB19__GRX1>,
+						 <PIN_PB20__GTX0>,
+						 <PIN_PB21__GTX1>,
+						 <PIN_PB22__GMDC>,
+						 <PIN_PB23__GMDIO>;
+					bias-disable;
+				};
 
-					pinctrl_qspi0_sck_cs_default: qspi0_sck_cs_default {
-						pinmux = <PIN_PA22__QSPI0_SCK>,
-							 <PIN_PA23__QSPI0_CS>;
-						bias-disable;
-						u-boot,dm-pre-reloc;
-					};
+				pinctrl_qspi0_sck_cs_default: qspi0_sck_cs_default {
+					pinmux = <PIN_PA22__QSPI0_SCK>,
+						 <PIN_PA23__QSPI0_CS>;
+					bias-disable;
+					u-boot,dm-pre-reloc;
+				};
 
-					pinctrl_qspi0_dat_default: qspi0_dat_default {
-						pinmux = <PIN_PA24__QSPI0_IO0>,
-							 <PIN_PA25__QSPI0_IO1>,
-							 <PIN_PA26__QSPI0_IO2>,
-							 <PIN_PA27__QSPI0_IO3>;
-						bias-pull-up;
-						u-boot,dm-pre-reloc;
-					};
+				pinctrl_qspi0_dat_default: qspi0_dat_default {
+					pinmux = <PIN_PA24__QSPI0_IO0>,
+						 <PIN_PA25__QSPI0_IO1>,
+						 <PIN_PA26__QSPI0_IO2>,
+						 <PIN_PA27__QSPI0_IO3>;
+					bias-pull-up;
+					u-boot,dm-pre-reloc;
+				};
 
-					pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
+				pinctrl_sdmmc0_default: sdmmc0_default {
+					cmd_dat {
 						pinmux = <PIN_PA1__SDMMC0_CMD>,
 							 <PIN_PA2__SDMMC0_DAT0>,
 							 <PIN_PA3__SDMMC0_DAT1>,
@@ -235,7 +235,7 @@
 						u-boot,dm-pre-reloc;
 					};
 
-					pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
+					ck_cd_default {
 						pinmux = <PIN_PA0__SDMMC0_CK>,
 							 <PIN_PA10__SDMMC0_RSTN>,
 							 <PIN_PA11__SDMMC0_VDDSEL>,
@@ -243,8 +243,10 @@
 						bias-disable;
 						u-boot,dm-pre-reloc;
 					};
+				};
 
-					pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
+				pinctrl_sdmmc1_default: sdmmc1_default {
+					cmd_dat {
 						pinmux = <PIN_PA28__SDMMC1_CMD>,
 							 <PIN_PA18__SDMMC1_DAT0>,
 							 <PIN_PA19__SDMMC1_DAT1>,
@@ -254,42 +256,42 @@
 						u-boot,dm-pre-reloc;
 					};
 
-					pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
+					ck_cd {
 						pinmux = <PIN_PA22__SDMMC1_CK>,
 							 <PIN_PA30__SDMMC1_CD>;
 						bias-disable;
 						u-boot,dm-pre-reloc;
 					};
+				};
 
-					pinctrl_spi0_default: spi0_default {
-						pinmux = <PIN_PA14__SPI0_SPCK>,
-							 <PIN_PA15__SPI0_MOSI>,
-							 <PIN_PA16__SPI0_MISO>;
-						bias-disable;
-						u-boot,dm-pre-reloc;
-					};
+				pinctrl_spi0_default: spi0_default {
+					pinmux = <PIN_PA14__SPI0_SPCK>,
+						 <PIN_PA15__SPI0_MOSI>,
+						 <PIN_PA16__SPI0_MISO>;
+					bias-disable;
+					u-boot,dm-pre-reloc;
+				};
 
-					pinctrl_uart1_default: uart1_default {
-						pinmux = <PIN_PD2__URXD1>,
-							 <PIN_PD3__UTXD1>;
-						bias-disable;
-						u-boot,dm-pre-reloc;
-					};
+				pinctrl_uart1_default: uart1_default {
+					pinmux = <PIN_PD2__URXD1>,
+						 <PIN_PD3__UTXD1>;
+					bias-disable;
+					u-boot,dm-pre-reloc;
+				};
 
-					pinctrl_usb_default: usb_default {
-						pinmux = <PIN_PB10__GPIO>;
-						bias-disable;
-					};
+				pinctrl_usb_default: usb_default {
+					pinmux = <PIN_PB10__GPIO>;
+					bias-disable;
+				};
 
-					pinctrl_usba_vbus: usba_vbus {
-						pinmux = <PIN_PA31__GPIO>;
-						bias-disable;
-					};
+				pinctrl_usba_vbus: usba_vbus {
+					pinmux = <PIN_PA31__GPIO>;
+					bias-disable;
+				};
 
-					pinctrl_onewire_tm_default: onewire_tm_default {
-						pinmux = <PIN_PB0__GPIO>;
-						bias-pull-up;
-					};
+				pinctrl_onewire_tm_default: onewire_tm_default {
+					pinmux = <PIN_PB0__GPIO>;
+					bias-pull-up;
 				};
 			};
 		};
diff --git a/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi
index 6013867..d294ddb 100644
--- a/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi
+++ b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi
@@ -28,7 +28,7 @@
 	u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
+&pioA {
 	u-boot,dm-pre-reloc;
 };
 
diff --git a/arch/arm/dts/at91-sama7g5ek.dts b/arch/arm/dts/at91-sama7g5ek.dts
index eaba0de..aed84f1 100644
--- a/arch/arm/dts/at91-sama7g5ek.dts
+++ b/arch/arm/dts/at91-sama7g5ek.dts
@@ -690,46 +690,67 @@
 	};
 
 	pinctrl_sdmmc0_default: sdmmc0_default {
-		pinmux = <PIN_PA1__SDMMC0_CMD>,
-			 <PIN_PA3__SDMMC0_DAT0>,
-			 <PIN_PA4__SDMMC0_DAT1>,
-			 <PIN_PA5__SDMMC0_DAT2>,
-			 <PIN_PA6__SDMMC0_DAT3>,
-			 <PIN_PA7__SDMMC0_DAT4>,
-			 <PIN_PA8__SDMMC0_DAT5>,
-			 <PIN_PA9__SDMMC0_DAT6>,
-			 <PIN_PA10__SDMMC0_DAT7>,
-			 <PIN_PA0__SDMMC0_CK>,
-			 <PIN_PA2__SDMMC0_RSTN>,
-			 <PIN_PA14__SDMMC0_CD>,
-			 <PIN_PA11__SDMMC0_DS>;
+		cmd_data {
+			pinmux = <PIN_PA1__SDMMC0_CMD>,
+				 <PIN_PA3__SDMMC0_DAT0>,
+				 <PIN_PA4__SDMMC0_DAT1>,
+				 <PIN_PA5__SDMMC0_DAT2>,
+				 <PIN_PA6__SDMMC0_DAT3>,
+				 <PIN_PA7__SDMMC0_DAT4>,
+				 <PIN_PA8__SDMMC0_DAT5>,
+				 <PIN_PA9__SDMMC0_DAT6>,
+				 <PIN_PA10__SDMMC0_DAT7>;
 			slew-rate = <0>;
 			bias-pull-up;
+		};
+
+		ck_cd_rstn_vddsel {
+			pinmux = <PIN_PA0__SDMMC0_CK>,
+				 <PIN_PA2__SDMMC0_RSTN>,
+				 <PIN_PA14__SDMMC0_CD>,
+				 <PIN_PA11__SDMMC0_DS>;
+			slew-rate = <0>;
+			bias-pull-up;
+		};
 	};
 
 	pinctrl_sdmmc1_default: sdmmc1_default {
-		pinmux = <PIN_PB29__SDMMC1_CMD>,
-			 <PIN_PB31__SDMMC1_DAT0>,
-			 <PIN_PC0__SDMMC1_DAT1>,
-			 <PIN_PC1__SDMMC1_DAT2>,
-			 <PIN_PC2__SDMMC1_DAT3>,
-			 <PIN_PB30__SDMMC1_CK>,
-			 <PIN_PB28__SDMMC1_RSTN>,
-			 <PIN_PC5__SDMMC1_1V8SEL>,
-			 <PIN_PC4__SDMMC1_CD>;
-		slew-rate = <0>;
-		bias-pull-up;
+		cmd_data {
+			pinmux = <PIN_PB29__SDMMC1_CMD>,
+				 <PIN_PB31__SDMMC1_DAT0>,
+				 <PIN_PC0__SDMMC1_DAT1>,
+				 <PIN_PC1__SDMMC1_DAT2>,
+				 <PIN_PC2__SDMMC1_DAT3>;
+			slew-rate = <0>;
+			bias-pull-up;
+		};
+
+		ck_cd_rstn_vddsel {
+			pinmux = <PIN_PB30__SDMMC1_CK>,
+				 <PIN_PB28__SDMMC1_RSTN>,
+				 <PIN_PC5__SDMMC1_1V8SEL>,
+				 <PIN_PC4__SDMMC1_CD>;
+			slew-rate = <0>;
+			bias-pull-up;
+		};
 	};
 
 	pinctrl_sdmmc2_default: sdmmc2_default {
-		pinmux = <PIN_PD3__SDMMC2_CMD>,
-			 <PIN_PD5__SDMMC2_DAT0>,
-			 <PIN_PD6__SDMMC2_DAT1>,
-			 <PIN_PD7__SDMMC2_DAT2>,
-			 <PIN_PD8__SDMMC2_DAT3>,
-			 <PIN_PD4__SDMMC2_CK>;
-		slew-rate = <0>;
-		bias-pull-up;
+		cmd_data {
+			pinmux = <PIN_PD3__SDMMC2_CMD>,
+				 <PIN_PD5__SDMMC2_DAT0>,
+				 <PIN_PD6__SDMMC2_DAT1>,
+				 <PIN_PD7__SDMMC2_DAT2>,
+				 <PIN_PD8__SDMMC2_DAT3>;
+			slew-rate = <0>;
+			bias-pull-up;
+		};
+
+		ck {
+			pinmux = <PIN_PD4__SDMMC2_CK>;
+			slew-rate = <0>;
+			bias-pull-up;
+		};
 	};
 
 	pinctrl_spdifrx_default: spdifrx_default {
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index d92bdd5..790b746 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -799,18 +799,13 @@
 				status = "disabled";
 			};
 
-			pioA: gpio@fc038000 {
-				compatible = "atmel,sama5d2-gpio";
+			pioA: pinctrl@fc038000 {
+				compatible = "atmel,sama5d2-pinctrl";
 				reg = <0xfc038000 0x600>;
 				clocks = <&pioA_clk>;
 				gpio-controller;
 				#gpio-cells = <2>;
 				u-boot,dm-pre-reloc;
-
-				pinctrl {
-					compatible = "atmel,sama5d2-pinctrl";
-					u-boot,dm-pre-reloc;
-				};
 			};
 		};
 	};
diff --git a/arch/arm/dts/sama5d27_som1.dtsi b/arch/arm/dts/sama5d27_som1.dtsi
index db4fefa..f920077 100644
--- a/arch/arm/dts/sama5d27_som1.dtsi
+++ b/arch/arm/dts/sama5d27_som1.dtsi
@@ -103,54 +103,52 @@
 				status = "okay";
 			};
 
-			pioA: gpio@fc038000 {
-				pinctrl {
-					pinctrl_i2c0_default: i2c0_default {
-						pinmux = <PIN_PD21__TWD0>,
-							 <PIN_PD22__TWCK0>;
-						bias-disable;
-					};
+			pioA: pinctrl@fc038000 {
+				pinctrl_i2c0_default: i2c0_default {
+					pinmux = <PIN_PD21__TWD0>,
+						 <PIN_PD22__TWCK0>;
+					bias-disable;
+				};
 
-					pinctrl_i2c1_default: i2c1_default {
-						pinmux = <PIN_PD4__TWD1>,
-							 <PIN_PD5__TWCK1>;
-						bias-disable;
-					};
+				pinctrl_i2c1_default: i2c1_default {
+					pinmux = <PIN_PD4__TWD1>,
+						 <PIN_PD5__TWCK1>;
+					bias-disable;
+				};
 
-					pinctrl_macb0_phy_irq: macb0_phy_irq {
-						pinmux = <PIN_PD31__GPIO>;
-						bias-disable;
-					};
+				pinctrl_macb0_phy_irq: macb0_phy_irq {
+					pinmux = <PIN_PD31__GPIO>;
+					bias-disable;
+				};
 
-					pinctrl_macb0_rmii: macb0_rmii {
-						pinmux = <PIN_PD9__GTXCK>,
-							 <PIN_PD10__GTXEN>,
-							 <PIN_PD11__GRXDV>,
-							 <PIN_PD12__GRXER>,
-							 <PIN_PD13__GRX0>,
-							 <PIN_PD14__GRX1>,
-							 <PIN_PD15__GTX0>,
-							 <PIN_PD16__GTX1>,
-							 <PIN_PD17__GMDC>,
-							 <PIN_PD18__GMDIO>;
-						bias-disable;
-					};
+				pinctrl_macb0_rmii: macb0_rmii {
+					pinmux = <PIN_PD9__GTXCK>,
+						 <PIN_PD10__GTXEN>,
+						 <PIN_PD11__GRXDV>,
+						 <PIN_PD12__GRXER>,
+						 <PIN_PD13__GRX0>,
+						 <PIN_PD14__GRX1>,
+						 <PIN_PD15__GTX0>,
+						 <PIN_PD16__GTX1>,
+						 <PIN_PD17__GMDC>,
+						 <PIN_PD18__GMDIO>;
+					bias-disable;
+				};
 
-					pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
-						pinmux = <PIN_PB5__QSPI1_SCK>,
-							 <PIN_PB6__QSPI1_CS>;
-						bias-disable;
-						u-boot,dm-pre-reloc;
-					};
+				pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
+					pinmux = <PIN_PB5__QSPI1_SCK>,
+						 <PIN_PB6__QSPI1_CS>;
+					bias-disable;
+					u-boot,dm-pre-reloc;
+				};
 
-					pinctrl_qspi1_dat_default: qspi1_dat_default {
-						pinmux = <PIN_PB7__QSPI1_IO0>,
-							 <PIN_PB8__QSPI1_IO1>,
-							 <PIN_PB9__QSPI1_IO2>,
-							 <PIN_PB10__QSPI1_IO3>;
-						bias-pull-up;
-						u-boot,dm-pre-reloc;
-					};
+				pinctrl_qspi1_dat_default: qspi1_dat_default {
+					pinmux = <PIN_PB7__QSPI1_IO0>,
+						 <PIN_PB8__QSPI1_IO1>,
+						 <PIN_PB9__QSPI1_IO2>,
+						 <PIN_PB10__QSPI1_IO3>;
+					bias-pull-up;
+					u-boot,dm-pre-reloc;
 				};
 			};
 		};
diff --git a/arch/arm/dts/sama5d27_wlsom1.dtsi b/arch/arm/dts/sama5d27_wlsom1.dtsi
index 889a003..1c23b8c 100644
--- a/arch/arm/dts/sama5d27_wlsom1.dtsi
+++ b/arch/arm/dts/sama5d27_wlsom1.dtsi
@@ -41,36 +41,34 @@
 				};
 			};
 
-			pioA: gpio@fc038000 {
-				pinctrl {
-					pinctrl_macb0_phy_irq: macb0_phy_irq {
-						pinmux = <PIN_PB24__GPIO>;
-						bias-disable;
-					};
+			pioA: pinctrl@fc038000 {
+				pinctrl_macb0_phy_irq: macb0_phy_irq {
+					pinmux = <PIN_PB24__GPIO>;
+					bias-disable;
+				};
 
-					pinctrl_macb0_rmii: macb0_rmii {
-						pinmux = <PIN_PB14__GTXCK>,
-							 <PIN_PB15__GTXEN>,
-							 <PIN_PB16__GRXDV>,
-							 <PIN_PB17__GRXER>,
-							 <PIN_PB18__GRX0>,
-							 <PIN_PB19__GRX1>,
-							 <PIN_PB20__GTX0>,
-							 <PIN_PB21__GTX1>,
-							 <PIN_PB22__GMDC>,
-							 <PIN_PB23__GMDIO>;
-						bias-disable;
-					};
+				pinctrl_macb0_rmii: macb0_rmii {
+					pinmux = <PIN_PB14__GTXCK>,
+						 <PIN_PB15__GTXEN>,
+						 <PIN_PB16__GRXDV>,
+						 <PIN_PB17__GRXER>,
+						 <PIN_PB18__GRX0>,
+						 <PIN_PB19__GRX1>,
+						 <PIN_PB20__GTX0>,
+						 <PIN_PB21__GTX1>,
+						 <PIN_PB22__GMDC>,
+						 <PIN_PB23__GMDIO>;
+					bias-disable;
+				};
 
-					pinctrl_qspi1_default: qspi1_default {
-						pinmux = <PIN_PB5__QSPI1_SCK>,
-							 <PIN_PB6__QSPI1_CS>,
-							 <PIN_PB7__QSPI1_IO0>,
-							 <PIN_PB8__QSPI1_IO1>,
-							 <PIN_PB9__QSPI1_IO2>,
-							 <PIN_PB10__QSPI1_IO3>;
-						bias-pull-up;
-					};
+				pinctrl_qspi1_default: qspi1_default {
+					pinmux = <PIN_PB5__QSPI1_SCK>,
+						 <PIN_PB6__QSPI1_CS>,
+						 <PIN_PB7__QSPI1_IO0>,
+						 <PIN_PB8__QSPI1_IO1>,
+						 <PIN_PB9__QSPI1_IO2>,
+						 <PIN_PB10__QSPI1_IO3>;
+					bias-pull-up;
 				};
 			};
 		};
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index 97400dc..d38090d 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -187,8 +187,8 @@
 			reg = <0xe0008000 0x20>;
 		};
 
-		pinctrl: pinctrl@e0014000 {
-			compatible = "microchip,sama7g5-gpio";
+		pioA: pinctrl@e0014000 {
+			compatible = "microchip,sama7g5-pinctrl";
 			reg = <0xe0014000 0x800>;
 			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
@@ -196,14 +196,10 @@
 				<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
-
-			pioA: pinctrl_default {
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				compatible = "microchip,sama7g5-pinctrl";
-			};
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			gpio-controller;
+			#gpio-cells = <2>;
 		};
 
 		pmc: pmc@e0018000 {
diff --git a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
index d8f32c9..8cf67d1 100644
--- a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
+++ b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
@@ -19,6 +19,8 @@
 #include <asm/io.h>
 #include <asm/mach-types.h>
 
+extern void at91_pda_detect(void);
+
 DECLARE_GLOBAL_DATA_PTR;
 
 void at91_prepare_cpu_var(void);
@@ -27,6 +29,8 @@
 {
 	at91_prepare_cpu_var();
 
+	at91_pda_detect();
+
 	return 0;
 }
 
diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig
index 99f61d7..c8dffa8 100644
--- a/configs/sam9x60_curiosity_mmc_defconfig
+++ b/configs/sam9x60_curiosity_mmc_defconfig
@@ -72,4 +72,8 @@
 CONFIG_ATMEL_USART=y
 CONFIG_TIMER=y
 CONFIG_MCHP_PIT64B_TIMER=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_DS24XXX=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 4d00ee2..6b5486c 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -265,10 +265,10 @@
 	u8 id;
 	u8 cid;
 } sam9x60_systemck[] = {
-	{ .n = "ddrck",		.p = "mck_pres", .id = 2, .cid = ID_DDR, },
+	{ .n = "ddrck",		.p = "mck_div",  .id = 2, .cid = ID_DDR, },
 	{ .n = "pck0",		.p = "prog0",    .id = 8, .cid = ID_PCK0, },
 	{ .n = "pck1",		.p = "prog1",    .id = 9, .cid = ID_PCK1, },
-	{ .n = "qspick",	.p = "mck_pres", .id = 19, .cid = ID_QSPI, },
+	{ .n = "qspick",	.p = "mck_div",  .id = 19, .cid = ID_QSPI, },
 };
 
 /**
diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c
index 77a76c1..47ed297 100644
--- a/drivers/gpio/atmel_pio4.c
+++ b/drivers/gpio/atmel_pio4.c
@@ -350,10 +350,8 @@
 
 static const struct udevice_id atmel_pio4_ids[] = {
 	{
-		.compatible = "atmel,sama5d2-gpio",
 		.data = (ulong)&atmel_sama5d2_pioctrl_data,
 	}, {
-		.compatible = "microchip,sama7g5-gpio",
 		.data = (ulong)&microchip_sama7g5_pioctrl_data,
 	},
 	{}
diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c
index 2b5ceea..37b0bee 100644
--- a/drivers/mmc/atmel_sdhci.c
+++ b/drivers/mmc/atmel_sdhci.c
@@ -52,6 +52,17 @@
 	struct mmc mmc;
 };
 
+static int atmel_sdhci_deferred_probe(struct sdhci_host *host)
+{
+	struct udevice *dev = host->mmc->dev;
+
+	return sdhci_probe(dev);
+}
+
+static const struct sdhci_ops atmel_sdhci_ops = {
+	.deferred_probe	= atmel_sdhci_deferred_probe,
+};
+
 static int atmel_sdhci_probe(struct udevice *dev)
 {
 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
@@ -104,6 +115,7 @@
 		return ret;
 
 	host->mmc->priv = host;
+	host->ops = &atmel_sdhci_ops;
 	upriv->mmc = host->mmc;
 
 	clk_free(&clk);
diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c
index 26fb5d6..50e3dd4 100644
--- a/drivers/pinctrl/pinctrl-at91-pio4.c
+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
@@ -9,10 +9,13 @@
 #include <common.h>
 #include <dm.h>
 #include <asm/global_data.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
 #include <dm/pinctrl.h>
 #include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/err.h>
+#include <dm/uclass-internal.h>
 #include <mach/atmel_pio4.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -28,6 +31,25 @@
 	unsigned int slew_rate_support;
 };
 
+/*
+ * Table keeping track of the pinctrl driver's slew rate support and the
+ * corresponding index into the struct udevice_id of the gpio_atmel_pio4 GPIO
+ * driver. This has been done in order to align the DT of U-Boot with the DT of
+ * Linux. In Linux, a phandle from a '-gpio' DT property is linked to the
+ * pinctrl driver, unlike U-Boot which redirects this phandle to a corresponding
+ * UCLASS_GPIO driver. Thus, in order to link the two, a hook to the bind method
+ * of the pinctrl driver in U-Boot has been added. This bind method will attach
+ * the GPIO driver to the pinctrl DT node using this table.
+ * @slew_rate_support	 pinctrl driver's slew rate support
+ * @gdidx		 index into the GPIO driver's struct udevide_id
+ *			 (needed in order to properly bind with driver_data)
+ */
+
+struct atmel_pinctrl_data {
+	unsigned int slew_rate_support;
+	int gdidx;
+};
+
 static const struct pinconf_param conf_params[] = {
 	{ "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
 	{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
@@ -130,12 +152,11 @@
 
 #define MAX_PINMUX_ENTRIES	40
 
-static int atmel_pinctrl_set_state(struct udevice *dev, struct udevice *config)
+static int atmel_process_config_dev(struct udevice *dev, struct udevice *config)
 {
 	struct atmel_pio4_plat *plat = dev_get_plat(dev);
-	struct atmel_pio4_port *bank_base;
-	const void *blob = gd->fdt_blob;
 	int node = dev_of_offset(config);
+	struct atmel_pio4_port *bank_base;
 	u32 offset, func, bank, line;
 	u32 cells[MAX_PINMUX_ENTRIES];
 	u32 i, conf;
@@ -143,18 +164,17 @@
 
 	conf = atmel_pinctrl_get_pinconf(config, plat);
 
-	count = fdtdec_get_int_array_count(blob, node, "pinmux",
+	/*
+	 * The only case where this function returns a negative error value
+	 * is when there is no "pinmux" property attached to this node
+	 */
+	count = fdtdec_get_int_array_count(gd->fdt_blob, node, "pinmux",
 					   cells, ARRAY_SIZE(cells));
-	if (count < 0) {
-		printf("%s: bad pinmux array %d\n", __func__, count);
-		return -EINVAL;
-	}
+	if (count < 0)
+		return count;
 
-	if (count > MAX_PINMUX_ENTRIES) {
-		printf("%s: unsupported pinmux array count %d\n",
-		       __func__, count);
+	if (count > MAX_PINMUX_ENTRIES)
 		return -EINVAL;
-	}
 
 	for (i = 0 ; i < count; i++) {
 		offset = ATMEL_GET_PIN_NO(cells[i]);
@@ -174,6 +194,56 @@
 	return 0;
 }
 
+static int atmel_pinctrl_set_state(struct udevice *dev, struct udevice *config)
+{
+	int node = dev_of_offset(config);
+	struct udevice *subconfig;
+	int subnode, subnode_count = 0, ret;
+
+	/*
+	 * If this function returns a negative error code then that means
+	 * that either the "pinmux" property of the node is missing, which is
+	 * the case for pinctrl nodes that do not have all the pins with the
+	 * same configuration and are split in multiple subnodes, or something
+	 * else went wrong and we have to stop. For the latter case, it would
+	 * mean that the node failed even though it has no subnodes.
+	 */
+	ret = atmel_process_config_dev(dev, config);
+	if (!ret)
+		return ret;
+
+	/*
+	 * If we reach here, it means that the subnode pinctrl's DT has multiple
+	 * subnodes. If it does not, then something else went wrong in the
+	 * previous call to atmel_process_config_dev.
+	 */
+	fdt_for_each_subnode(subnode, gd->fdt_blob, node) {
+		/* Get subnode as an udevice */
+		ret = uclass_find_device_by_of_offset(UCLASS_PINCONFIG, subnode,
+						      &subconfig);
+		if (ret)
+			return ret;
+
+		/*
+		 * If this time the function returns an error code on a subnode
+		 * then something is totally wrong so abort.
+		 */
+		ret = atmel_process_config_dev(dev, subconfig);
+		if (ret)
+			return ret;
+
+		subnode_count++;
+	}
+
+	/*
+	 * If we somehow got here and we do not have any subnodes, abort.
+	 */
+	if (!subnode_count)
+		return -EINVAL;
+
+	return 0;
+}
+
 const struct pinctrl_ops atmel_pinctrl_ops  = {
 	.set_state = atmel_pinctrl_set_state,
 };
@@ -181,24 +251,57 @@
 static int atmel_pinctrl_probe(struct udevice *dev)
 {
 	struct atmel_pio4_plat *plat = dev_get_plat(dev);
-	ulong priv = dev_get_driver_data(dev);
+	struct atmel_pinctrl_data *priv = (struct atmel_pinctrl_data *)dev_get_driver_data(dev);
 	fdt_addr_t addr_base;
 
-	dev = dev_get_parent(dev);
 	addr_base = dev_read_addr(dev);
 	if (addr_base == FDT_ADDR_T_NONE)
 		return -EINVAL;
 
 	plat->reg_base = (struct atmel_pio4_port *)addr_base;
-	plat->slew_rate_support = priv;
+	plat->slew_rate_support = priv->slew_rate_support;
 
 	return 0;
 }
 
+static int atmel_pinctrl_bind(struct udevice *dev)
+{
+	struct udevice *g;
+	struct driver *drv;
+	ofnode node = dev_ofnode(dev);
+	struct atmel_pinctrl_data *priv = (struct atmel_pinctrl_data *)dev_get_driver_data(dev);
+
+	if (!CONFIG_IS_ENABLED(ATMEL_PIO4))
+		return 0;
+
+	/* Obtain a handle to the GPIO driver */
+	drv = lists_driver_lookup_name("gpio_atmel_pio4");
+	if (!drv)
+		return -ENOENT;
+
+	/*
+	 * Bind the GPIO driver to the pinctrl DT node, together
+	 * with its corresponding driver_data.
+	 */
+	return device_bind_with_driver_data(dev, drv, drv->name,
+					    drv->of_match[priv->gdidx].data,
+					    node, &g);
+}
+
+static const struct atmel_pinctrl_data atmel_sama5d2_pinctrl_data = {
+	.gdidx = 0,
+};
+
+static const struct atmel_pinctrl_data microchip_sama7g5_pinctrl_data = {
+	.slew_rate_support = 1,
+	.gdidx = 1,
+};
+
 static const struct udevice_id atmel_pinctrl_match[] = {
-	{ .compatible = "atmel,sama5d2-pinctrl" },
+	{ .compatible = "atmel,sama5d2-pinctrl",
+	  .data = (ulong)&atmel_sama5d2_pinctrl_data, },
 	{ .compatible = "microchip,sama7g5-pinctrl",
-	  .data = (ulong)1, },
+	  .data = (ulong)&microchip_sama7g5_pinctrl_data, },
 	{}
 };
 
@@ -206,6 +309,7 @@
 	.name = "pinctrl_atmel_pio4",
 	.id = UCLASS_PINCTRL,
 	.of_match = atmel_pinctrl_match,
+	.bind = atmel_pinctrl_bind,
 	.probe = atmel_pinctrl_probe,
 	.plat_auto	= sizeof(struct atmel_pio4_plat),
 	.ops = &atmel_pinctrl_ops,